Enabling VFP on Cortex R4

Before VFP extension on Cortex can be used, it needs to be enabled.
Following is a C code that does that.
Tested on TMS570 with GCC compiler.

// enable coprocessor 10 and 11 access
asm(" MRC p15,0,R0,c1,c0,2"); // first read CPACR
asm(" ORR R0,R0,#0xF0,16");   // adjust CP10 and CP11 access bits
asm(" MCR p15,0,R0,c1,c0,2"); // write modified CPACR back
asm(" MRC p15,0,R0,c1,c0,2"); // read back - optionally could check:
                              // if 0x00F00000 mask not set the VFP is not present

// When the Security Extensions are implemented,
// the NSACR controls whether each coprocessor can be
// accessed from the Non-secure state

// enable the Advanced SIMD and VFP extensions  
asm(" FMRX R0,FPEXC");      // read FPEXC
asm(" ORR  R0,R0,#0x40,8"); // set EN bit
asm(" FMXR FPEXC,R0");      // write modified value back to FPEXC  

// VFP instruction execution is now allowed
asm(" VMOV S0,R0");